Professor Prem Chand Jain presented a review paper titled "Recent trends in next generation Terabit Ethernet" at CSI-2015, 50th Golden Jubilee Annual Convention.

Smart phones, Tablets, Wi-Fi (Wireless Local Area Network), 3G, 4G, IPTV etc. have increased the pressure on Ethernet data rates in last five years and hence industries were forced to standardize 10, 40, 100 Gigabit Ethernet (GbE) speeds presently, and 400GbE,1Terabit Ethernet (TbE) and 10TbE speeds in coming years. The increase in bit rate depends on the number of users, increase in access, and services. The BW requirement of network is doubling every 18 months while the computer BW is doubling every 24 months as per Moore's law. This road map gives direction to the industries for next several years. According to the roadmap the Global network needs 1TbE in 2015 and 10 TbE by 2020. Such bit rates can be achieved either by very high speed routers and switches which are quite costly or significant optical parallelization to provide cost effective solution.

The Ethernet standard was initiated by IEEE802.3 working group in 1970 and then introduced 1GbE in 1998, 10GbE in 2002, and 40 and 100GbE in 2010. It is also standardizing 2.5, 5, 25GbE which is although a back step to 40 and 100GbE. The 25GbE will reduce the cost per bit since 40 and 100GbE are still costly to deploy in the market.

Facebook often skip old technology and go for new technology because their data centers grow two to three times every 8 to 10 years. Facebook needs 100 GbE instead of 40 GbE, but 100 GbE is new and quite costly due to optical pluggable electrical-to-optical interface modules. Pluggable modules are not viable solutions due to its cost, heat dissipation, and faceplate density. The optical transport equipments require a multiplexing which adds significant cost. If the backbone routers can support original speed of optical transport, then significant cost due to optical parallelization can be reduced for high speed links in comparison to cost of multiplicity of lower speed links. To achieve 1TbE data rate, IP routers should also be 1Terabit interface. However, optical parallelization will be used till 1TbE interface not available in the market. To improve the efficiency of optical parallelization, substantial improvements in Photonics integration technology is required. Terabit Ethernet will require high capacity interconnections between switches and routers at Internet Exchange and Internet service providers. The photonics integration is very useful when Electrical-to-Optical (E/O) or (O/E) conversion for an ultra high speed interface is required. There are losses when E/O or O/E conversions are done. Silicon-photonics integration is a key process for very high speed optical communication and networks, CPU interconnect, and Data storage in multi-Terabit Ethernet. Silicon photonics allows to build high speed optical communication devices using low cost silicon material rather than expensive gallium and indium semiconductor materials. This permits integration of optical transceivers with multiple wavelengths on System-on-Chip (SoC) to deliver photonic SoC. In this integration silicon material acts as an optical medium. This will eliminate cooling and will save the energy to reduce power consumption. It may be noted that a few centimeters distance on PCB between optical medium and SoC degrades the signal quality at 10Gbps data rates. To overcome such a signal degradation and jitter, SoC and optical transceivers are combined into a single integrated package which replaces multiple external optical transceivers. This helps to reduce data errors which are caused by parasitic elements in the signal path. Optical wave guides, modulators, photo detectors can be integrated in a single device. Silicon photonics provides platform for monolithic integration of optics and microelectronics for very high data streams required in TbE. Monolithic integration provides lower assembly cost and small chip size which results in a lower chip cost. The semiconductor materials used for such a platform are thin 220nm silicon-on-Insulator (SoI) and thick 2-4um SoI. The key challenge is to reduce cost of silicon photonics to 70% which is now spent on packaging and testing of optical components.

As on 2015, 400GbE is under development broadly using similar technology as used in 100GbE. The 400GbE standard study group began in March, 2013, approved in 2014 and subsequently the 802.3bs standard is expected by 2017. The 400GbE LAN interfaces will continue parallel transmission approach as used by 100GbE. The 400GbE can be obtained from 4X100Gbps or 16X25Gbps using 4 or 16 wavelengths respectively. Similarly the 1TbE can be achieved using (40X25Gbps) 40 optical lanes in each direction with each lane operating at 25Gbps or 10 optical lanes operating in each direction at 100Gbps (10X100Gbps). The paper discussed on wired LAN with 100, 400GbE, extending to 1TbE which is expected by 2020.